1. Field of the Invention
The present invention generally relates to an image scanning device, an image processing device, and an image forming apparatus, and more particularly relates to an image processing device that enables reducing an offset of an image signal, an image scanning device including the image processing device, and an image forming apparatus, such as a copier, a facsimile, or a multifunction copier having functions of a copier and a facsimile, including the image processing device or the image scanning device.
2. Description of the Related Art
In a scanning process by a reducing optical system, a scan head moving in the sub-scanning direction receives reflected light from a document and focuses the reflected light via a lens on a CCD line sensor, and the CCD line sensor converts the focused light into an analog electric signal by photoelectric conversion. Then, the analog electric signal is converted into a digital signal through analog processing and digital processing. Thus, an image on a document is converted into digital data. A conventional scanning process by a reducing optical system is described below with reference to FIG. 9.
FIG. 9 is a block diagram illustrating an exemplary functional configuration of a conventional image scanning device. In the exemplary conventional image scanning device shown in FIG. 9, an analog electric signal obtained by a CCD line sensor (hereafter simply called CCD) 101 is input to an analog processing ASIC 104 via an analog processing buffer 102′ and an AC coupling capacitor 103. In the analog processing ASIC 104, line-clamping is performed on the voltage level of a light shield portion 201 or a blank transfer portion 203 (see FIG. 2) in each line cycle of the analog electric signal input from the CCD 101. “Line-clamping” means fixing the voltage level of a portion of a signal at a desired level. The voltage level fixed by line-clamping is called a clamp level and is used as the black level of image data. An exemplary analog electric signal input from the CCD 101 is described below.
FIG. 2 is a drawing used to describe the relationship between an input analog electric signal and a clamp control signal. As shown in FIG. 2, one cycle of an input analog electric signal is composed of a light shield portion 201, an effective pixel portion 202, and a blank transfer portion 203. Each cycle composed of the light shield portion 201, the effective pixel portion 202, and the blank transfer portion 203 is called a line cycle. In FIG. 9, the line-clamped analog electric signal (image signal) is amplified by a variable gain amplifier 143. The gain (ratio of output level to input level) of the variable gain amplifier 143 is predetermined so that a level obtained by scanning a reference white document becomes a target level.
The amplified image signal is converted into a digital signal based on a reference level generated from a reference voltage by an analog-to-digital (A/D) converter 144. Thus, an image on a document is converted into digital data. In the exemplary configuration shown in FIG. 9, driving signals for driving the CCD 101 and the A/D converter 144 of the analog processing ASIC 104 are generated by a driving signal generating unit 153 of a timing control unit 105 based on a reference clock signal.
More specifically, an analog electric signal obtained by the CCD 101 is input to the analog processing ASIC 104 via the analog processing buffer 102′ and the AC coupling capacitor 103. In the analog processing ASIC 104, a line-clamp circuit 141 performs line-clamping on the voltage level of the light shield portion 201 or the blank transfer portion 203 in each line cycle of the analog electric signal. The voltage level fixed by line-clamping is called a clamp level and is used by a sample and hold circuit 142 as the black level of image data. The line-clamped analog electric signal (image signal) is amplified by the variable gain amplifier 143 with a predetermined gain. The gain of the variable gain amplifier 143 is so determined that a level obtained by scanning a reference white document becomes a target level. The amplified image signal is converted into a digital signal based on a reference level generated from a reference voltage by the A/D converter 144. Thus, an image on a document is converted into digital data.
In a line-clamping operation, as shown in FIG. 2, the line-clamp circuit 141 clamps the electric potential of the blank transfer portion 203 in each line cycle of an analog electric signal from the CCD 101 to a clamp level. More specifically, a first analog switch SW1 (hereafter, also called a first switch SW1) is kept turned on during a period of time corresponding to the blank transfer portion 203 using a clamp control signal as a switching signal. When the first switch SW1 is turned on, a clamp level voltage is supplied from the outside and the AC coupling capacitor 103 is charged. During a period of time corresponding to the light shield portion 201 and the effective pixel portion 202, the first switch SW1 is kept turned off. Thus, the electric potential of an electric charge stored in the AC coupling capacitor 103 is maintained. The electric potential of the AC coupling capacitor 103, however, changes as the electric charge decreases because of, for example, current leakage. To prevent this change, the first switch SW1 is turned on again at the blank transfer portion 203 in the next line cycle.
In the above line-clamping operation, if the ON-resistance of the first switch SW1 is high, a voltage drop equivalent to “current leakage×ON-resistance” occurs. The voltage drop results in a difference between a usable clamp level voltage and an original clamp level voltage supplied from the outside, and therefore causes an offset of an image signal.
To obviate the above problem, an image scanning device disclosed in patent document 1 is configured to appropriately correct an offset level by using a simple circuit other than a clamp circuit. In the disclosed image scanning device, an offset level detecting unit of a digital processing unit detects an offset level of a digital signal, a correction value calculating unit calculates a correction value that is a deviation from a target level based on the detected offset level, a D/A converter converts the correction value into an analog correction signal, and an offset level correction unit feeds back the analog correction signal directly to an amplifier circuit in an analog processing unit to correct the offset level.
Since no clamp circuit, which may cause a voltage droop, is used, the disclosed image scanning device makes it possible to maintain the offset level of a digital signal without being influenced by a voltage droop.
Also, patent document 2 discloses an image scanning device that can stably and accurately adjust the difference between black levels of analog signals output through different paths from a CCD image sensor. The disclosed image scanning device includes a D/A converter that is selectively connected to a reference terminal of an A/D converter. The disclosed image scanning device detects the difference between the black levels of analog signals output through different paths by connecting the D/A converter to the reference terminal of the A/D converter and by using a stable reference voltage from the D/A converter. With this configuration, the disclosed image scanning device can stably and accurately adjust the difference between the black levels of analog signals without being affected by original image density.
[Patent document 1] Japanese Patent Application Publication No. 2002-057899
[Patent document 2] Japanese Patent Application Publication No. 2000-106629
However, technologies disclosed in patent documents 1 and 2 are not designed to reduce an offset of a clamp level caused by problems related to a clamping operation by an analog processing unit, and therefore cannot be used to reduce an offset of an image signal caused by the difference between a usable clamp level voltage and an original clamp level voltage supplied from the outside.